Readout supervisor

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Readout supervisor

The readout supervisor is the main real-time controller of the complete front-end system. It must perform a long list of important tasks:

  • Receive bunch crossing and bunch structure synchronization signals from the LHC accelerator.
  • Distribute bunch crossing clock to all front-end modules.
  • Generate and distribute real time resets to front-end.
  • Receive L0 trigger decisions from L0 trigger decision unit.
  • Ensure correct synchronization of received L0 triggers.
  • Apply restrictions to L0 trigger accepts to prevent buffer overflows in the L0 electronics.
  • Apply restrictions to L0 trigger accepts to prevent the L1 front-end and the DAQ system to overflow.
  • Distribute L0 trigger decisions to L0 electronics.
  • Distribute Event readout types to L1 front-end electronics.
  • Perform load balancing of DAQ CPU farm.
  • Handle event packing factor for MEPS depending on trigger types.
  • Distribute Multi Event Packet destinations to L1 front-end electronics.
  • Send General event information to DAQ system
  • Generate reset and trigger sequences for debugging/testing and calibration runs.
  • On ECS request send monitoring counter snapshot TTC broadcast to front-end electronics

The Readout Supervisor is a part of the Timing and Fast Control (TFC).

The final distribution of clocks, triggers and resets are performed by the TTC system.

During normal running only one readout supervisor will control the front-end electronics of all the sub-detectors. During debugging/testing and calibrations each subsystem will have its own readout supervisor.